The Good Folk Series

Accelerate SoC Development with MINRES Flexible, Scalable IP

Why Development Teams Choose MINRES hardware IP

The Good Folk Series

The Good Cores (TGC)

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TGC*A

  • RV32E or RV64E Zicsr Zifencei (16 GPR)
  • 3 stage, single issue in-order pipeline
  •  No caching or branch prediction
  • Machine mode only
  • CLINT and wait for interrupt (WFI) support
  • Memory bus interface: AHB3 Lite, AXI4, AXI4Lite, OCP, and OBI 1.0

TGC*B

  • RV32I or RV64I Zicsr Zifencei
  • 3 stage, single issue in-order pipeline
  • Machine mode only
  • CLINT & wait for interrupt (WFI) support
  • Memory bus interface: AHB3 Lite, AXI4, AXI4Lite, OCP, and OBI 1.0

TGC*C

  • RV32IMC or RV64IMC Zicsr Zifencei
  • Machine mode only
  • 4 stage, single issue in-order pipeline
  • CLINT & wait for interrupt (WFI) support
  • Memory bus interface: AHB3 Lite, AXI4, AXI4Lite, OCP, and OBI 1.0

TGC*D

  • RV32IMC or RV64IMC Zicsr Zifencei
  • Machine & User mode
  • 4 stage, single issue in-order pipeline
  • CLIC + wait for interrupt (WFI) support
  • Memory bus interface: AHB3 Lite, AXI4, AXI4Lite, OCP, and OBI 1.0
  • Physical memory protection (PMP)

TGC*E

  • RV32IMC or or RV64IMC Zicsr Zifencei
  • Machine & User mode
  • 5 stage, single issue in-order pipeline
  • No caching or branch prediction
  • CLIC + wait for interrupt (WFI) support
  • Memory bus interface: AHB3 Lite, AXI4, AXI4Lite, OCP, and OBI 1.0
  • Physical memory protection (PMP)

Optional features:

• LR/SC support (part of A extension)
• Custom instructions
• Non-maskable interrupts (NMI)
• Safety features: ECC, parity and lockstep
• Cache support
• Branch prediction
• Trace and debug capabilities
• Hart to encoder trace interface
• User mode (U extension)
• User level interrupts (tentatively reserved N extension)

What’s Next in The Good Folk Series?

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