DVCon Europe 2025: Arteris, MINRES and the Fraunhofer Institute present improvements to SoC modeling and architectural exploration

DVCon Europe October 14, 11:30 AM – 1:00 PM | Forum 5 | 2BEfficient SoC Modeling, Architectural Exploration, and Result Analysis using TLM2-based IPsPresented by Rocco Jonack of MINRES Technologies GmbH (and representing Arteris), and Matthias Jung of Fraunhofer IESEProgram: https://dvcon-europe.org/program/2025/2025-tutorials The tutorial at DVCon will demonstrate how the collaboration of the three companies (MINRES Technologies, Arteris and Fraunhofer IESE), […]