Rocco Jonack – MINRES Technologies GmbH

Rocco Jonack

DVCon Europe 2025: Arteris, MINRES and the Fraunhofer Institute present improvements to SoC modeling and architectural exploration

DVCon Europe October 14, 11:30 AM – 1:00 PM | Forum 5 | 2BEfficient SoC Modeling, Architectural Exploration, and Result Analysis using TLM2-based IPsPresented by Rocco

October 2, 2025

Rocco Jonack

Debug. And Trace. They’re not always two sides of the same coin

A recent MINRES project with Accemic made me stop and think about how debug and trace are often lumped together in the design flow. But

September 15, 2025

RISC-V Tournament: Come Join The Battle of HDLs
Supply Chain Security Part 2: Mitigating Attacks
Embedding Lifecycle Security to build European Sovereignty in AI and Defense
Pipelined RISC-V in RHDL: A Five-Stage Journey Through Hazards and Stalls
Implementing ISO 9001 as a small company: why it’s worth it