Developer Resources
Resources and active projects from MINRES Technologies to support your own development and enable you to make full use of MINRES productivity IP, tools and design IP.
TGC VP
Virtual platform modeling TGC based systems
TGC-VP is a virtual platform built around a TGC core. It allows a fast and easy entry into the world of TGC-Core-Family series. Furthermore, this system is a good starting point for building any RISC-V based VP system.
Besides the ISS, TGC-VP provides an always on module, plic and clic interrupt controllers, gpio, qspi, an UART terminal and several other peripherals.
Most peripherals are imported from the VPV-Per library. VPV-Per is an open-source library that provides SystemC/TLM2 implementation examples of peripherals for various SoCs.
A generic router model and the memories are parts of the SystemC-Components-Library
More details and initial setup of the TGC-VP was shown at a Meetup of the RISC-V Duisburg Group:
SCViewer is a simple tool to display VCD and transaction streams created by the SystemC VCD trace implementation and the SystemC Verification Library (SCV). The viewer has the following features
- support of VCD files (compressed and uncompressed)
– real numbers
– showing vectors and real numbers as analog (step-wise & continuous)
– various value representations of bit vectors - support of SCV transaction recordings in various formats
– text log files (compressed and uncompressed)
– visualization of transaction relations
SCViewer is available as standalone version and can be downloaded at Github.
It can also be installed into an Eclipse application by using the update site at https://minres.github.io/SCViewer/repository.
Please note that this is work in progress
SystemC Components Library
SystemC modeling primitives and blocks to quickly start writing models
Here is a short list of features.
Extended logging and log configuration implementation
Config file reader and configuration handler
Automatic tracer
Various optimized trace file implementations
- compressed VCD
- FST (used by GTKWave)
Tracing TLM2 Sockets
Stripped down version of SCV
Extended and optimized transaction recording database(s)
sysc::sc_variable
sysc::sc_register
sysc::tlm_target
sysc::router
various TLM2.0 AT and pin-level adapters for common bus protocols like
- APB
- AHB
- AXI/ACE
- OBI
The full documentation can be found at the Github pages