My Journey as a Working Student at MINRES
When I look back at my journey at MINRES Technologies GmbH from July 2024 to August 2025, I realize how much this experience has shaped my professional and personal growth. This was my first real working experience, and it has been a truly transformative year filled with challenges, learning opportunities, and unforgettable memories.
I began my journey by working on RISC-V subsystem block-level verification. My focus was on the hardware and software co-verification of different modules such as UART, GPIO, and the System Control Module. My main responsibility was to write test cases for modules like GPIO and UART, ensuring that any bugs in the RTL design could be detected and addressed. I collaborated closely with senior engineers to validate the functionality and contribute to delivering bug-free RTL designs.
One of the most exciting parts of this work was using cocotb, a Python-based verification framework. For me, this represented a modern approach to RTL verification, and it gave me a chance to explore how Python can accelerate the traditionally complex verification process. It was challenging at first, but with guidance from experienced colleagues, I was able to gain confidence in working with this methodology.
MINRES embraces remote collaboration. Most of my day-to-day work was done remotely, which gave me flexibility while still keeping me connected with the team. At the same time, I truly valued our quarterly offsite gatherings. These events, held in beautiful locations such as Munich and Achensee, were not just about reviewing company progress and projects. They were opportunities to bond with colleagues, to share ideas, and to feel part of a corporate family.
Another highlight of my time here was the weekly all-hands meeting. Everyone—from working student to the General Manager—participated, sharing updates on their work, industry insights, or recent learnings. This made it easy to stay connected across the team and gain exposure to areas outside of my direct responsibilities. Additionally, every two weeks we had technical sessions, which I found extremely valuable. These sessions helped me expand my knowledge of new industry technologies and motivated me to keep learning beyond my daily tasks.
In April 2025, I began working on my Master’s thesis with MINRES, under the guidance of Eyck Jentzsch. My thesis focused on the verification of the UART with the APB interface. For this, I once again relied on cocotb and also explored pyuvm, which gave me a deeper understanding of verification methodologies and the tools used in modern chip design. This thesis allowed me to dive deeper into verification concepts while applying them to a practical use case, and it became one of the most enriching parts of my time at MINRES.
In total, I spent 1 year and 2 months as part of MINRES. This journey was more than just a professional experience—it was a chance to learn, collaborate, and grow alongside talented individuals. I am grateful for the support, the knowledge shared, and the opportunities I was given. As I move forward, I will always carry the lessons I learned here, both in terms of technical expertise and the importance of a collaborative, open culture.
I am excited to share that I will be representing MINRES Technologies GmbH at DVCon Europe 2025 in Munich with my engineering paper. This opportunity not only allows me to present my work, but also to showcase the innovative approach of MINRES. I am truly grateful to the company and the support of my collaborative colleagues Stas, Lucas, Florian, and Eyck, for such a fantastic opportunity.
The details are as follows. I hope to meet some of you at DVCon:
Wednesday Oct 15th, Forum 4 – Session 6a, 215-345pm (Part of Next Gen UVM testbenches session)
#116 Evaluating the Usability of pyuvm with cocotb for UART Verification (Engineering Paper)
Mihir Ashvinbhai Donga, Eyck Jentzsch and Juergen Mottok
Are you interested in working with the team at MINRES