Modern edge devices power everything from industrial IoT systems to advanced automotive sensor processing. With shifts from centralized cloud infrastructures to processing data directly at the source, new challenges emerge: constraints on performance, power consumption, safety, and security. At the same time, reducing latency and bandwidth usage has become critical. These demands call for scalable, customizable hardware–software platforms capable of supporting highly application-specific solutions.

Designing such systems from scratch, however, is both time-consuming and costly.

This is where Scale4Edge comes in. The German project set out to accelerate the development of energy-efficient, scalable edge computing solutions based on the open and modular RISC-V instruction set architecture (ISA). By leveraging RISC-V’s flexibility and openness, Scale4Edge strengthens technological sovereignty and enables European industry and research institutions to build tailored, domain-specific processors without restrictive licensing barriers.

Scale4Edge established a comprehensive ecosystem spanning the full stack — from hardware components such as RISC-V cores, accelerators, and computing platforms to software infrastructure including design and simulation tools, verification environments, compilers, and board support packages. Funded by the German Federal Ministry of Research, Technology and Space (BMFTR, FKZ: 16ME0135), the project brought together more than 20 partners from industry and academia to collaboratively shape next-generation edge solutions.

MINRES Contributions to the Scale4Edge Ecosystem

Within this ecosystem, MINRES played a central role by contributing key building blocks:

TGC – The Good Core

MINRES contributed TGC (The Good Core) as a foundational RISC-V ecosystem core. Thanks to its generator-based architecture, TGC is highly configurable and scalable, making it an ideal central building block. During the project, the core was enhanced with multiple architectural features and support for standard RISC-V extensions, along with straightforward integration of custom instruction set extensions. Importantly, ISO 26262 certifiability was considered from the outset, addressing safety-critical automotive requirements.

Moonlight Reference Platform

Building on TGC, MINRES developed Moonlight, a configurable reference platform that surrounds the core with a flexible subsystem. It offers multiple options for connecting memory systems, application-specific components, and peripherals via a high-speed bus. Like TGC, Moonlight follows a generator-based approach, enabling rapid system composition and seamless integration of project-specific IP blocks.

Virtual Platform

To support early development and verification, MINRES implemented a Virtual Platform modeling TGC, bus interfaces, and peripherals. This environment enables software development to begin early in the design cycle, supports design space exploration, and allows RTL validation against the virtual model to ensure consistent and predictable behavior.

Software Enablement

A board support package and a comprehensive software development kit were also provided, ensuring developers could efficiently build and deploy software for the target systems.

Strong Academic and Industrial Collaboration

Collaboration was a cornerstone of the project. MINRES has worked closely with many partners to extend the ecosystem, a few of these include:

• Advancing CoreDSL for ISA-level modeling and building infrastructure for integrating ISA extensions together with TU Darmstadt.
• Integrating formal methods into virtual platforms, particularly concolic testing, with the University of Bremen.
• Analyzing TGC for side-channel vulnerabilities in collaboration with RPTU University Kaiserslautern-Landau.
• Developing and presenting demonstrations — including ASIC tapeouts — with partners such as the University of Tübingen, TU Darmstadt, Paderborn University, and Robert Bosch GmbH.

Why RISC-V Matters

At the heart of all these efforts lies RISC-V. Its open, modular architecture allows domain-specific customization, supports innovation across the ecosystem, and reduces dependency on proprietary instruction sets. For edge computing — where efficiency, security, and specialization are essential — RISC-V provides the flexibility required to build competitive, future-proof solutions.

Scale4Edge demonstrates how an effort coordinated across industry and scientific communities built on RISC-V can accelerate innovation, strengthen semiconductor expertise, and create a sustainable foundation for next-generation edge intelligence.