Skip to content
  • Products
    • The Good Folk Series
    • RAVEN
  • Service
  • Developer Resources
  • About Us
    • Our Company
    • Team
    • Job Openings
  • Insights
  • Contact
  • Products
    • The Good Folk Series
    • RAVEN
  • Service
  • Developer Resources
  • About Us
    • Our Company
    • Team
    • Job Openings
  • Insights
  • Contact
Contact us
Rocco Jonack

DVCon Europe 2025: Arteris, MINRES and the Fraunhofer Institute present improvements to SoC modeling and architectural exploration

DVCon Europe October 14, 11:30 AM – 1:00 PM | Forum 5 | 2BEfficient SoC Modeling, Architectural Exploration, and Result Analysis using TLM2-based IPsPresented by Rocco

READ MORE »
October 2, 2025
  • Building Scalable Edge Intelligence with Scale4Edge and RISC-V
  • Integrating QEMU in SystemC Virtual Platforms: why official library support would make it easier
  • Flexible Embedded AI for Automotive Systems: Hardware-Independent DNN Deployment with RISC-V
  • Supply Chain Security for Developers
  • NVIDIA’s AI chip dominance won’t last forever

MINRES methodology

Silicon-proven

Accelerating Next-Gen SoC Design

Built on trusted methods, high-efficiency IP, and powerful tools.

Our proactive partnership approach ensures seamless integration of hardware and software, empowering customers to design smarter and more efficiently.

Get in Touch with Our Experts

Contact us
Github Linkedin
©2026 MINRES Technologies

Imprint   Privacy Policy