We recently published a paper analysing the state of the RISC-V market, the opportunities and the devolution of the applications that are now opening up
In our previous post, Pipelined RISC-V in RHDL, we described how we translated an existing VHDL implementation of a pipelined RISC-V processor into RHDL, synthesized
At MINRES, we are always trying to find ways to improve hardware design productivity, verification workflows, and system-level integration – and in doing so end
Modern automotive systems feature a range of sensors and cameras, providing input to driver assistance systems. Deep Neural Networks (DNNs) executed in embedded AI platforms
DVCon Europe October 14, 11:30 AM – 1:00 PM | Forum 5 | 2BEfficient SoC Modeling, Architectural Exploration, and Result Analysis using TLM2-based IPsPresented by Rocco
